Cirrus 3CFM Bedienungsanleitung Seite 8

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Seitenansicht 7
CDB4228A
8 DS511DB1
JUMPER PURPOSE POSITION FUNCTION SELECTED
VD Selects the supply voltage for the
CS4228A digital core.
3.3V*
5V
VL Selects the supply voltage for the
CS4228A logic interface pins
3.3V
5V*
RX PWR Selects the supply voltage for the
Altera PLD I/O pins.
3.3V
5V*
OSC PWR Connects power to the oscillator ON*
OFF
S1 Connects power and clocks to
the CS8414
ON*
OFF
Power and LRCLK and SCLK are connected
Power, LRCLK, and SCLK are disconnected
S2 Selects control port interface PP*
EXTRNL
Parallel port control enabled.
EXTRNL CTRL header enabled
S3 Selects the CS4228A SDIN1,2,3
source in EXTRNL control mode
SPDIF*
DAP
CS8414 data is routed to SDIN1,2,3
SDIN1,2,3 source is the DAP
S4 Selects the control port data for-
mat
Two wire*
SPI
Two wire control format
SPI control format
S5 Selects serial mode and DAP
clock directions in EXTRNL con-
trol mode.
CLOSED*
OPEN
See external control mode section for more
information.
JP2 Optional pin header select for
MCLK
OSC
SPDIF MCLK
MUX MCLK
MCLK source is onboard oscillator.
MCLK source is CS8414 receiver
MCLK source is multiplexer
Notes: *Default setting from factory
Table 4. CDB4228A Jumper and Switch Settings
TX-MCLK
[1..0]
MCLK
Division Ratio
System MCLK
Rate
0 1:1 128
*1 1:2 256
2 1:3 384
3 1:4 512
Table 5. Transmitter Clock Divider Settings
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